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Workshop: June 5
13:30-18:00Intel Workshop

Day 1: June 6
09:00-17:00Registration
09:30-09:40Opening
09:40-10:30Keynote 1: Christian Plessl
Chair: João M. P. Cardoso
10:30-11:00Coffee break
11:00-12:40Session 1: FPGA
Chair: Yuichiro Shibata
12:40-14:10Lunch
14:10-15:00Keynote 2: Hiroki Nakahara
Chair: Shinya Takamaeda-Yamazaki
15:00-16:30Poster Session & Coffee Break
Chair: Shinya Takamaeda-Yamazaki
16:30-17:30Design Competition
Chair: Minoru Watanabe
18:15-18:30Bus Boarding & Departure
19:00-21:00Banquet at Garden Terrace Nagasaki Hotel & Resort

Day 2: June 7
09:00-16:30Registration
09:35-09:40Opening
09:40-10:30Keynote 3: Ken Oyama
Chair: Hideharu Amano
10:30-11:00Coffee break
11:00-12:15Session 2: System Software and Platform
Chair: Jason Anderson
12:15-14:00Lunch
14:00-15:15Session 3: High Performance Computing
Chair: Takefumi Miyoshi
15:15-15:45Coffee Break
15:45-17:00Session 4: Architecture
Chair: Yoshiki Yamaguchi
17:00-17:10Closing

Session 1: FPGA

  • Heterogeneous Resource-Elastic Scheduling for CPU+FPGA Architectures
    Anuj Vaishnav, Khoa Pham and Dirk Koch
  • Performance Evaluation of Tsunami Simulation Exploiting Temporal Parallelism on FPGAs using OpenCL
    Fumiya Kono and Naohito Nakasato
  • Physical Design Considerations for Synthesizable Standard-Cell-Based FPGAs
    Brett Grady and Jason H. Anderson
  • Scalable Filtering Modules for Database Acceleration on FPGAs
    Kristiyan Manev, Anuj Vaishnav, Charalampos Kritikakis and Dirk Koch

Session 2: System Software and Platform

  • A type-safe arbitrary precision arithmetic portability layer for HLS tools
    Luc Forget, Yohann Uguen, Florent de Dinechin and David Thomas
  • Implementation of FPGA Building Platform as a Cloud Service
    Ryota Watanabe, Saika Ura, Qian Zhao and Takaichi Yoshida
  • mROS: A Lightweight Runtime Environment for Robot Software Components onto Embedded Devices
    Hideki Takase, Tomoya Mori, Kazuyoshi Takagi and Naofumi Takagi

Session 3: High Performance Computing

  • Effectiveness of performance tuning techniques for general matrix multiplication on the PEZY-SC2
    Kazuya Matsumoto, Naohito Nakasato and Toshiaki Hishinuma
  • An ARM-based heterogeneous FPGA accelerator for Hall thruster simulation
    Hiroyuki Noda, Manfred Orsztynowicz, Kensuke Iizuka, Takaaki Miyajima, Naoyuki Fujita and Hideharu Amano
  • Scaling performance for N-Body Stream Computation with a ring of FPGAs
    Jens Huthmann, Shin Abiko, Artur Podobas, Kentaro Sano and Hiroyuki Takizawa

Session 4: Architecture

  • A software bridged data transfer on a FPGA cluster by using pipelining and InfiniBand verbs
    Takaaki Miyajima, Tomoya Hirao, Naoya Miyamoto, Jeongdo Son and Kentaro Sano
  • A Layer-Adaptable Cache Hierarchy by a Multiple-layer Bypass Mechanism
    Ryusuke Egawa, Masayuki Sato, Ryoma Saito and Hiroaki Kobayashi
  • Software-based Dynamic Overlays Require Fast, Fine-grained Partial Reconfiguration
    Hossein Omidian and Guy Lemieux

Poster Session

  • An Efficient Instruction Fetch Architecture for a RISC-V Soft Processor on an FPGA
    Hiromu Miyazaki, Junya Miura and Kenji Kise
  • The Evaluation of Partial Reconfiguration for a Multi-board FPGA System FiCSW
    Miho Yamakura, Kazuei Hironaka, Keita Azegami, Kazusa Musha and Hideharu Amano
  • FPGA-based Implementation of Memory-Intensive Application Using OpenCL
    Iman Firmansyah, Du Changdao, Norihisa Fujita, Yoshiki Yamaguchi and Taisuke Boku
  • A Parameterizable Feedback FxLMS Architecture for FPGA Platforms
    Alexander Klemd, Jonas Hanselka, Marcel Eckert, Bernd Klauer and Delf Sachau
  • Acceleration of Deep Recurrent Neural Networks with an FPGA cluster
    Yuxi Sun, Akram Ben Ahmed and Hideharu Amano
  • A High-Level Synthesis Design for a Scalable Hydrodynamic Simulation on OpenCL FPGA Platform
    Du Changdao and Yamaguchi Yoshiki

Design Competition Papers

  • An FPGA based Autonomous Driving Car Design using Multiple Simple Neural Networks for Decision Making
    Musashi Aoto, Shoya Hirukawa, Kazutaka Maruyama, Yasutaka Wada
  • FPGA integrated development platform for ROS based autonomous mobile robot
    Yasuhiro Nitta, Sou Tamura, Hideki Takase
  • Implementation of Autonomous FPGA Robot Car
    Akira Kojima, Yohei Nose
  • a Platform of Micro UGV for Small Scale Autonomous Driving System Using SoC
    Yuuya Kudo, Atsushi Takada, Takumi Sakai, Yuuta Ishida, Tomonori Izumi
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