2014

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• FPGA Implementation of a Video Based Abnormal Action Detection System with Real-Time Cubic Higher Order Local Auto-Correlation Analysis
  K. Hamasaki, K. Dohi, Y. Shibata, K. Oguri
  Proc. International Symposium on Applied Reconfigurable Computing (ARC 2014), Lecture Notes in Computer Science, vol.8405, pp.191-196 (2014.04)
  

2013

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• Performance Modeling and Optimization of 3-D Stencil Computation on a Stream-based FPGA Accelerator
  K. Dohi, K. Fukumoto, Y. Shibata, K. Oguri
  Proc. International Conference on Reconfigurable Computing and FPGAs (ReConFig2013), pp.1-6 (2013.12)
  

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• A Fast Runtime Visualization of a GPU-Based 3D-FDTD Electromagnetic Simulation
  K. Aoki, K. Dohi, Y. Shibata, K. Oguri, T. Fujimoto
  Proc. International Symposium on Computing and Networking (CANDAR'13), pp.30-37 (2013.12)
  

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• FPGAアクセラレータを用いた三次元ステンシル計算における電力性能モデルの検討
  土肥慶亮，福本航太，柴田裕一郎，小栗　清
  電子情報通信学会技術研究報告，Vol.113(221) RECONF2013-23, pp.19-24 (2013.09)
  

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• FPGA Implementation of Human Detection by HOG Features with AdaBoost
  K. Dohi, K. Negi, Y. Shibata, K. Oguri
  IEICE Trans. Information and Systems Vol.E96-D(8), pp.1676-1684 (2013.08)
  

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• A Fast Runtime Visualization Framework for Efficient Development of Scientific Applications on CUDA
  K. Aoki, K. Dohi, Y. Shibata, K. Oguri
  Proc. International Symposium on Highly-Efficient Accelerators and Reconfigurable Technologies (HEART2013), pp.117-120 (2013.06)
  

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• Performance Characterization of a Reconfigurable Computing Platform with High-level Synthesis
  K. Dohi, Y. Nakamura, Y. Shibata, K. Oguri
  Proc. Joint Symposium of Jeju National University and Nagasaki University on Science and Technology (JSST2013) pp.59-62 (2013.06)
  

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• An FPGA_based Board Game AI Engine Using an Image Processing Technique
  Y. Shibata, M. Oishi, K. Okina, R. Soejima, R. Iyoya, K. Dohi, K. Oguri
  Proc. Joint Symposium of Jeju National University and Nagasaki University on Science and Technology (JSST2013) pp.136-139 (2013.06)
  

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• 高位合成系を用いた三次元ステンシル計算における性能モデルの検証
  土肥慶亮，中村芳大，柴田裕一郎，小栗　清
  電子情報通信学会技術研究報告，Vol.113(52), RECONF2013-12, pp.61-66 (2013.05)
  

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• FPGAによる動画像からのリアルタイム特徴抽出と異常動作検出
  浜崎　薫，土肥慶亮，柴田裕一郎，小栗　清
  電子情報通信学会技術研究報告，Vol.113(52), RECONF2013-14, pp.73-78 (2013.05)
  

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• FPGA-Based HPRC Systems for Scientifc Applications
  T. Hamada, Y. Shibata
  High-Performance Computing Using FPGAs, Springer, pp.367-387 (2013.05)
  

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• DC-DCコンバータ制御用ニューラルネットワークのFPGA実装
  山邉芳彦，元村正志，山下健太郎，丸田英徳，柴田裕一郎，小栗　清，黒川不二雄
  電子情報通信学会技術研究報告，Vol.112(377), RECONF2012-66, pp.31-36 (2013.01)
  

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• FPGAアクセラレータと高位合成系を用いた瞳検出手法の実装
  土肥慶亮，柴田裕一郎，小栗　清
  電子情報通信学会技術研究報告，Vol.112(377), RECONF2012-86, pp.147-152 (2013.01)
  

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• FPGAアクセラレータと高位合成系を用いた三次元ステンシル計算の実装
  中村芳大，土肥慶亮，柴田裕一郎，小栗　清
  電子情報通信学会技術研究報告，Vol.112(337), RECONF2012-87, pp.153-158 (2013.01)
  

2012

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• Implementation of a GPU-Oriented Absorbing Boundary Condition for 3D-FDTD Electromagnetic Simulation
  K. Dohi, Y. Shibata, K. Oguri, T. Fujimoto
  IEICE Trans. Information and Systems, Vol.E95-D(12), pp.2787-2795 (2012.12)
  

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• Performance Comparison of GPU Programming Frameworks with the Striped Smith-Waterman Algorithm
  T. Kakimoto, K. Dohi, Y. Shibata, K. Oguri
  ACM SIGARCH Computer Architecture News, Vol.40(5), pp.70-75 (2012.12)
  

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• メモリ・レスの画像検出回路を実現する
  柴田裕一郎
  ディジタル・デザイン・テクノロジ「FPGAによる高速化設計」，6章，CQ出版 (2012.11)
  

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• FPGAにおける細粒度動的部分再構成機構の検討
  上田晋寛，河本尚輝，土肥慶亮，柴田裕一郎，小栗　清
  電子情報通信学会技術研究報告，Vol.112(203), RECONF2012-34, pp.61-66 (2012.09)
  

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• 動画像形状検出処理における動的部分再構成による省電力効果の検討
  河本尚輝，上田晋寛，土肥慶亮，柴田裕一郎，小栗　清
  電子情報通信学会技術研究報告，Vol.112(203), RECONF2012-36, pp.73-78 (2012.09)
  

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• Deep-pipelined FPGA Implementation for Ellipse Estimation for Eye Tracking
  K. Dohi, Y. Hatanaka, K. Negi, Y. Shibata, K. Oguri
  Proc. International Conference on Field Programmable Logic and Applications (FPL2012), pp.458-463 (2012.08)
  

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• FPGAにおける細粒度動的部分再構成機構の実装とその電力評価
  上田晋寛，河本尚輝，土肥慶亮，柴田裕一郎，小栗　清
  電子情報通信学会技術報告，FIIS12，No.335，pp.1-7 (2012.06)
  

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• 動画像からのリアルタイム瞳検出手法のFPGAによる実装
  畑中優磨，土肥慶亮，大戸和博，柴田裕一郎，小栗　清
  電子情報通信学会技術研究報告，Vol.112(70), RECONF2012-3, pp.13-18 (2012.05)
  

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• A novel P-I-D digital control FPGA for a switching power supply in HVDC system
  F. Kurokawa, K. Murata, R. Yoshida, Y. Shibata, K. Yamashita, T. Tanaka, K. Hirose
  Proc. IEEE International Symposium on Power Electronics for Distributed Generation Systems (PEDG 2012), pp.513-518 (2012.06)
  

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• FPGAを用いたDC-DCコンバータのディジタル制御における遅延制御法の検討
  山邉芳彦，中島華菜子，土肥慶亮，浜脇一馬，山下健太郎，梶原一宏，黒川不二雄，柴田裕一郎，小栗　清
  電子情報通信学会技術研究報告，Vol.112(70), RECONF2012-15, pp.83-88 (2012.05)
  

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• Application of SerDes for FPGA-based Digital DC-DC Converters
  Y. Yamabe, K. Nakashima, K. Dohi, K. Kajiwara, F. Kurokawa, Y. Shibata
  Proc. IEEE Symposium on Low-Power and High-Spped Chips (COOL Chips XV), p.1 (2012.04)
  

2011

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• Deep Pipelined One-chip FPGA Implementation of a Real-time Image-based Human Detection Algorithm
  K. Negi, K. Dohi, Y. Shibata, K. Oguri
  Proc. International Conference on Field Programmable Technology (FPT2011), pp.1-8 (2011.12)
  

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• FPGAを用いたアクセラレーションシステムにおけるデータパス分類用優良類似度の考察
  小川ゆい，長名保範，吉見真聡，舟橋　啓，広井賀子，天野英晴，柴田裕一郎，小栗　清
  電子情報通信学会技術研究報告，Vol.111(323), RECONF2011-46, pp.31-36 (2011.11)
  

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• 3D FDTD法における吸収境界条件のGPU実装の評価
  土肥慶亮，柴田裕一郎，小栗　清，藤本孝文
  電子情報通信学会技術研究報告，Vol.111(224), EST2011-79, pp.79-84 (2011.10)
  

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• Transient response of novel P-I-D digital control switching power supply for HVDC system
  F. Kurokawa, R. Yoshida, K. Murata, Y. Shibata, Y. Yamabe, K. Hamawaki, T. Takahashi, K. Bansho, T. Tanaka, K. Hirose
  IEEE International Telecommunications Energy Conference (INTELEC 2011), pp.1-6 (2011.10)
  

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• GPUを用いたアンテナ設計用電磁界シミュレーション
  柴田裕一郎，土肥慶亮，小栗清，藤本孝文
  電子情報通信学会ソサイエティ大会講演論文集, pp.60-61 (2011.09)
  

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• GPU Implementation and Optimization of Electromagnetic Simulation Using the FDTD Method for Antenna Designing
  K. Dohi, Y. Shibata, K. Oguri, T. Fujimoto
  ACM SIGARCH Computer Architecture News, Vol.39(4), pp.26-31 (2011.09)
  

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• A Discussion on Calculating Eigenvalues of Real Symmetric Tridiagonal Matrices on a GPU
  K. Matsunobu, K. Dohi, Y. Shibata, K. Oguri
  ACM SIGARCH Computer Architecture News, Vol.39(4), pp.100-101 (2011.09)
  

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• Pattern Compression of FAST Corner Detection for Efficient Hardware Implementation
  K. Dohi, Y. Yorita, Y. Shibata, K. Oguri
  Proc. International Conference Field-Programmable Logic and Applications (FPL2011), pp.478-481 (2011.09)
  

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• FAST Corner Detectionの検出パターンの圧縮とFPGAへの実装
  土肥慶亮，頼田祐二，柴田裕一郎，小栗　清
  電子情報通信学会技術研究報告，Vol.111(31), RECONF2011-2, pp.7-12 (2011.05)
  

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• ハードウェアに適したFAST Corner Detectionの検出パターンの圧縮
  頼田祐二，土肥慶亮，柴田裕一郎，小栗　清
  電子情報通信学会技術報告，FIIS11, No.302, pp.1-5 (2011.03)
  

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• リコンフィギャラブルシステム向きアルゴリズム
  柴田裕一郎
  知識ベース「知識の森」，6群5編6-2章，電子情報通信学会編 (2011.03)
  

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• アンテナ設計のためのFDTD法による電磁界シミュレーションのGPUへの実装
  土肥慶亮，柴田裕一郎，小栗　清，藤本孝文
  電子情報通信学会技術研究報告， Vol.110(361), CPSY2010-43, pp.25-30 (2011.01)
  

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• HOG特徴とAdaBoostによる人検出処理のFPGAへの実装
  大戸和博，土肥慶亮，柴田裕一郎，小栗　清
  電子情報通信学会技術研究報告，Vol.110(362), RECONF2010-69, pp.117-122 (2011.01)
  

2010

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• A Datapath Classification Method for FPGA-based Scientific Application Accelerator Systems
  Y. Ogawa, T. Ooya, Y. Osana, M. Yoshimi, Y. Nishikawa, A. Funahashi, N. Hiroi, H. Amanao, Y. Shibata, K. Oguri
  Proc. International Conference on Field Programmable Technology (FPT2010), pp.441-444 (2010.12)
  

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• FPGA Implementation of an Efficient Digital Control Mechanism for DC-DC Converters
  Y. Shibata
  Proc. DC Building Power Asia Conference (2010.12)
  

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• GPUによる実対称三重対角行列の固有値算出手法の検討
  松延耕平，土肥慶亮，柴田裕一郎，小栗　清
  電子情報通信学会技術研究報告，Vol.110(318), CPSY2010-35, pp.19-24 (2010.11)
  

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• Implementation of a Programming Environment with a Multithread Model for Reconfigurable Systems
  K. Dohi, Y. Shibata, T. Hamada, T. Masada, K. Oguri, D. Buell
  ACM SIGARCH Computer Architecture News, Vol.38(4), pp.40-45 (2010.09)
  

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• 可変ワード長をもつ再構成可能プロセッサによる有限体演算
  柴田裕一郎，原澤隆一，小栗　清
  電子情報通信学会技術研究報告，Vol.110(204), RECONF2010-21, pp.19-24 (2010.09)
  

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• Automatic Pipeline Construction Focused on Similarity of Rate Law Functions for an FPGA-based Biochemical Simulator
  H. Yamada, Y. Ogawa, T. Ooya, T. Ishimori, Y. Osana, M. Yoshimi, Y. Nishikawa, A. Funahashi, N. Hiroi, H. Amano, Y. Shibata, K. Oguri
  IPSJ Transactions on System LSI Design Methodology, Vol.3, pp.244-256 (2010.08)
  

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• A new fast-response digital control process for switching power supply
  F. Kurokawa, Y. Maeda, Y. Shibata, H. Maruta, T. Takahashi, K. Bansho, T. Tanaka, K. Hirose
  ELECTROMOTION, Vol.17(3) pp.220-225 (2010.07)
  

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• Highly Efficient Mapping of the Smith-Waterman Algorithm on CUDA-compatible GPUs
  K. Dohi, K. Genkrid, C. Ling, T. Hamada, Y. Shibata
  Proc. IEEE International Conference on Application-Specific Systems Architectures and Processors (ASAP2010), pp.29-36 (2010.07)
  

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• 再構成可能プロセッサによる有限体演算と最適既約多項式に関する一考察
  柴田裕一郎，喜屋武優介，原澤隆一，小栗　清
  電子情報通信学会技術報告，FIIS10, No.285, pp.1-6 (2010.06)
  

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• A novel digital PID controlled dc-dc converter
  F. Kurokawa, Y. Maeda, Y. Shibata, H. Maruta, T. Takahash, K. Bansho, T. Tanaka, K. Hirose
  Proc. International Symposium on Power Electronics, Electrical Drives, Automation and Motion (SPEEDAM 2010), pp.50-53 (2010.06)
  

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• GPUクラスタにおけるSmith-Watermanアルゴリズムの実装手法の提案
  土肥慶亮，柿本 雄，柴田裕一郎，濱田 剛，小栗 清
  先進的計算基盤システムシンポジウム，Vol.2010(5), pp.209-216 (2010.05)
  

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• FPGAを用いたDC-DCコンバータ向け高速比例ディジタルPID制御方式の実装
  浜脇一馬，前田雄輝，副島政人，柴田裕一郎，小栗　清，黒川不二雄
  電子情報通信学会技術研究報告，Vol.110(32), RECONF2010-1, pp.1-6 (2010.05)
  

2009

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• A Modular Approach to Heterogeneous Biochemical Model Simulation on an FPGA
  H. Yamada, Y. Osana, T. Ishimori, T. Ooya, M. Yoshimi, Y. Nishikawa, A. Funahashi, N. Hiroi, H. Amano, Y. Shibata, K. Oguri
  Proc. International Conference on Reconfigurable Computing and FPGAs (ReConFig2009), pp.125-130 (2009.12)
  

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• リコンフィギャラブルマシンにおけるDMA転送とデータ配置の自動最適化手法の検討
  志田さや香，土肥慶亮，柴田裕一郎，濱田剛，正田備也，小栗清
  電子情報通信学会論文誌，J92-D巻，第12号，pp.2127-2136 (2009.12)
  

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• Smith-WatermanアルゴリズムにおけるGPUを用いた実装方法の一提案
  土肥慶亮，Ling Cheng，濱田　剛，柴田裕一郎，小栗　清，Khaled Benkrid
  電子情報通信学会技術研究報告，Vol.109(319), CPSY2009-43, pp.1-6 (2009.12)
  

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• PCAにおける圧力の概念を用いた回路増殖法の評価
  荒木裕太，柴田裕一郎，濱田　剛，正田備也，小栗　清
  電子情報通信学会技術研究報告，Vol.109(320), RECONF2009-44, pp.19-24 (2009.12)
  

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• FPGAによる電源電圧制御回路の実装及び制御精度の評価
  副島政人，酒見隼也，柴田裕一郎，黒川不二雄，濱田　剛，正田備也，小栗　清
  電子情報通信学会技術研究報告，Vol.109(198), RECONF2009-22, pp.19-24 (2009.09)
  

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• FPGAに基づく生化学シミュレータにおける反応速度式の類似性に着目したパイプライン自動構築
  山田英樹，石森智也，大屋智範，柴田裕一郎，長名保範，吉見真聡，西川由理，天野英晴，舟橋　啓，広井賀子，小栗　清
  情報科学技術フォーラム論文集，第1分冊，pp.197-204 (2009.09)
  

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• Configuring Area and Performance: Empirical Evaluation on an FPGA-based Biochemical Simulator
  T. Ooya, H. Yamada, T. Ishimori, Y. Shibata, Y. Osana, K. Oguri, M. Yoshimi, Y. Nishikawa, A. Funahashi, N. Hiroi, H. Amano
  Proc. International Conference Field-Programmable Logic and Applications (FPL2009), pp.679-682 (2009.08)
  

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• Accelerating Phase Correlation Functions Using GPU and FPGA
  K. Matsuo, T. Hamada, M. Miyoshi, Y. Shibata, K. Oguri
  Proc. NASA/ESA Conference on Adaptive Hardware and Systems (AHS2009), pp.433-438 (2009.07)
  

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• A Novel Multiple-Walk Parallel Algorithm for the Barnes-Hut Treecode on GPUs - Towards Cost Effective, High Performance N-body Simulation
  T. Hamada, K. Nitadori, K. Benkrid, Y. Ohno, G. Morimoto, T. Masada, Y. Shibata, K. Oguri, M. Taiji
  Computer Science Research and Development, Vol.24(1), pp.21-31, (2009.05)
  

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• FPGAを用いた汎用生化学シミュレータにおけるハードウェアモジュール自動生成アルゴリズムの実機評価
  大屋智範，山田英樹，石森智也，柴田裕一郎，長名保範，吉見真聡，西川由理，天野英晴，舟橋　啓，広井賀子，小栗　清
  電子情報通信学会技術研究報告，Vol.109(26), RECONF2009-7, pp.37-42 (2009.05)
  

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• リコンフィギャラブルシステムにおけるマルチスレッドプログラミングモデルを用いたメモリアクセス最適化手法の一検討
  土肥慶亮，志田さや香，柴田裕一郎，濱田　剛，正田備也，小栗　清
  電子情報通信学会技術研究報告，Vol.109(26), RECONF2009-11, pp.61-66 (2009.05)
  

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• Evaluation of Arithmetic Precision for an FPGA-based Reconfigurable DC-DC Converter
  M. Soejima, S. Sukita, Y. Shibata, F. Kurokawa, T. Hamada, T. Masada, K. Oguri
  Proc. IEEE Symposium on Low-Power and High-Speed Chips (COOL Chips XII), p.169 (2009.04)
  

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• Bag of Timestamps: A Simple and Efficient Bayesian Chronological Mining
  T. Masada, A. Takasu, T. Hamada, Y. Shibata, K. Oguri
  Proc. Joint Conference on Asia-Pacific Web Conference and Web-Age Information Management, pp. 556-561 (2009.04)
  

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• Pipeline Scheduling with Input Port Constraints for an FPGA-Based Biochemical Simulator
  T. Ishimori, H. Yamada, Y. Shibata, Y. Osana, M. Yoshimi, Y. Nishikawa, H. Amano, A. Funahashi, N. Hiroi, K. Oguri
  Proc. International Conference on Applied Reconfigurable Computing (ARC 2009), pp. 368-373 (2009.03)
  

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• PCAにおける回路増殖法の評価
  荒木 裕太，柴田 裕一郎，濱田 剛，正田 備也，小栗 清
  電子情報通信学会機能集積情報システム研究会 (2009.03)
  

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• リコンフィギャラブルシステムにおけるマルチスレッドプログラミングモデルを用いた開発環境の構築
  土肥 慶亮，志田 さや香，柴田 裕一郎，濱田 剛，正田 備也，小栗 清
  電子情報通信学会機能集積情報システム研究会 (2009.03)
  

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• GPUを用いた位相限定相関法の高速化
  松尾 堅太郎，三好 正之，濱田 剛，柴田 裕一郎，正田 備也，小栗 清
  電子情報通信学会技術研究報告， Vol.108(425) IE2008-239, pp 201-206 (2009.02)